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It began in the 1970s with rumors rumbling from the outskirts of the American technology giant IBM, a new chip architecture capable of revolutionary processing speeds. It was called RISC. The RISC wars were fought over nearly 20 years, with the most intensive battles in the late 1980s and early 1990s. At its peak, it involved a mix of young chip upstarts and old giants across the world, throwing around benchmark Results. Sun Microsystems, MIPS Computer PA, RISC, IBM, PowerPC, DEC, Alpha, Fujitsu and NEC in Japan, Siemens and Philips in Europe. And of course, looming over them all, intel and the burgeoning Wintel death machine. It was a time of shifting alliances, leaps of inspiration, wild technical claims, and the iron fist of Intel. Today we delve into the legends of the risk wars. But first I want to remind you about the asianometry Patreon and the Early Access tier. Members get to see new videos first and get the references attached. Early Access directly supports the channel and really helps. Thank you. And on with the show. A computer CPUs basic operations are defined by instructions. You might think of instructions as like the computer hardware's verbs, a small action step that the software can tell the hardware to execute. Like for example, adding, subtracting, or comparing two numbers. All of these verbs together give you what we call an instruction set architecture, or isa. Note that the ISA is not the same as a microarchitecture, which refers to a processor's specific internal design. The design implements the isa. So if an ISA is like the verbs and language, then microarchitecture is like the accent or grammar style. Intel's 8086 microprocessor, the granddaddy of the x86 architecture, came out in 1978. It was a time when main memory was both expensive and slow, and the data pathways between that memory and CPU were tiny. In such a situation, you wanted the processor to hit the main memory as few times as possible. So chip architects define richer, more complicated instructions so that programmers can write less dense strength software programs. However, complicated instructions require more logic on the part of the CPU to interpret. Hardware wise, that means we'd need more transistors. But in the pre VLSI days, transistors on silicon were still very scarce. To work around this, intel and other chip makers of the age produced hardware level software code called microcode to serve as an extra translation layer. Microcode can be stored on cheaper hardware read only memories or ROMs memory chips with software permanently burned into its patterns. Less flexibility, but cheaper. So in essence, intel and other companies were trading Expensive RAM for inexpensive rom. The first computers had their own instruction sets. As software libraries emerged for those computers, the sets themselves became key moats for companies like IBM. But as those sets got thicker and bigger, people started asking, well, does it always have to be like that? In the early 1970s, IBM and Ericsson teamed up to build a digital telephone switch to compete against AT&T. Such a switch needed a fast controller chip and and an IBM internal team was formed to work on that. The instinct was to use microcoded based chips as like IBM's big System 370 mainframe lines. But IBM had already done that for another internal switch project called Rosebud, and that ended up being too slow and would not have handled many calls. Team leader and IBM fellow John Koch blamed that chip's sluggish performance on its microcode, believing that it introduced unnecessary overhead and degraded performance.
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So he and Al Chang designed a microprocessor implementing just the most essential instructions. Such a chip had fewer circuits and transistors, leaving space for more speed up tricks. The idea that you can get faster performance out of a microprocessor with a slimmed down Isaac was not unprecedented. Seymour Cray's supercomputers did it to optimize floating point operation performance for scientific computing. A 1978 study by L.J. shustak at Stanford studied a program written in COBOL. It found that of the 183 total available instructions, 99% of executions involved 48 of those instructions, a quarter of the total list. 90% of executions involved only 26 instructions. So there seemed to be an 80, 20ish rule where computers execute mostly the same instructions. Optimize the 80%, get them working very fast and you get a faster computer. The IBM team also leaned on software compilers which translate high level programming languages into machine code to produce smaller sets of instructions. This was the opposite of the thinking I just talked about earlier. The chips for intel and IBM's older computers preached simple software, more complex hardware, trading RAM for rom, right? Koch inverted that in this thinking. What actually got you a faster computer was something simple hardware, more complex software. Ericsson later pulled out of the Switch collaboration, but by then Koch really liked what progress they had. So he had them go ahead and produce a general purpose minicomputer prototype, the IBM 801. Upon his completion, the machine outperformed others of its era at certain tasks, running an integer heavy calculation benchmark 3, 4 times faster than a massive high end IBM 3033 mainframe can. Moreover, its compiler was so Good. That code compiled for and run on an 801 simulator program inside a traditional IBM 370 mainframe ran faster than native code compiled by production compilers for that same 370.
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IBM did not formally publish its ideas until 1982, but those ideas disseminated into the wider community. Long before then, IBM had consulted with several computer experts, including Professors Dave Patterson and Carlos Sequin at Berkeley, as well as Professor John Hennessy at Stanford. Rumors about the performance gains that IBM got from the 801 eventually led to two new university projects pursuing this new architectural approach, which Patterson called reduced Instruction Set Computer, or risc. So of course then all the older chips like Intel's X86, Motorola's 68K and IBM's System360, all very different from each other, got the label complex Instruction Set Computer, or cisc. Like Koch, Patterson hated microcode, harkening back to how he wasted so much time fixing microcode bugs back when he was at the computer firm DEC. And in 1980, Patterson launched the Berkeley RISC project, which produced the pioneering RISC 1 and 2 chips. A year later, Hennessey launched the MIPS project at Stanford. MIPS stands for million instructions per second, a performance metric that you are about to hear a whole lot. The project later spun off a venture funded startup called MIPS computer, which raised $22.4 million. If achieved in practice, RISC's blazing speeds and simpler designs were certainly tempting. It challenged what David Patterson and others called the existing paradigm, which was held by CISC chips. Patterson told the SF examiner in 1986, the real meaning of MIPS RISC technology is that it raises the possibility of breaking the stranglehold of IBM mainframe computers. These inexpensive microprocessors are roaring along, improving in performance at 40% a year and gobbling everything in sight. But several argued that the opportunity was overplayed. First of all, what exactly counted as risc? Like the relational database, and unlike something like high bandwidth memory, RISC was then more a concept than an actual spec. Some RISC supporters had simple rules saying that if an instruction set had 100 instructions or less, it was RISC. But then what about the instructions themselves? It is also important to add that complex instructions were still necessary for many applications, so compromises are unavoidable. Analyst William Zachman of IDC said in 1986, most commercially available RISC systems are a compromise between the aim of reduced instruction set and the need for more complex instructions in order for the systems to be of practical use. No pure RISC Architecture is likely to be a viable commercial system. Moreover, there was the software library problem. Programs compiled for CISC chips were written in a language that those chips can read. RISC chips cannot read those unless you recompile the program's original source code first. So switching to RISC would break the existing software library until developers adjusted and rewrote their software, a serious business issue. And this was partly why IBM took so long to commercialize Risk themselves. Original IBM 801 team member George Radin recalled executives emphasizing that IBM customers had invested a lot into their existing software and that it would be daunting to get them to move to a brand new architecture. Tom Murphy of IBM told Infoweek in 1985 the advantages offered by RISC architecture didn't convince people here it was worth the pain of rewriting our software. You never want to change your software if you can avoid it. For companies without IBM's baggage, though, RISC was an opportunity too tempting to ignore. One of the first companies to make the leap was the famous California computer maker Hewlett Packard. After IBM canceled the 801 Project in 1980, several members of the team relocated to HP to begin anew. This HP project began in 1981 or early 1982 to build internal software development. Computers working prototype processors were done by early 1984, and the rest quickly followed. In August 1985, the Hewlett Packard Journal published an article announcing their new architecture, High Precision Architecture. The article acknowledged that some might call this new architecture risk, but they saw it as more than that. They saw it as an opportunity to rethink all the prior assumptions made from before VLSI in the 1970s, before hardware finally got cheap and plentiful thanks to semiconductor technology. One can say that High Precision Architecture WILL was the first RISC chip to be announced by a major computer maker. It was later rebranded to PA risc, and Hewlett Packard would keep improving it over the years.
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Ultimately, IBM CEO John Akers decided that the giant did indeed want to offer a PC that ran both Unix and a RISC processor, perhaps as a response to HP or to the emergence of workstations, a category of powerful computers for performance oriented tasks, computational fluid dynamics, video editing, and visualizations in the scientific and technical fields. I want to emphasize that these workstations are different than PCs. They run different operating systems, usually a Unix based one. They were used in labs and universities rather than the office and home, and they also cost 100k to 250k. Unfortunately, the IBM workstation project bogged down when it unexpectedly received an influx of 300 people from another canceled project. And to be honest, IBM had never been that good at selling to the technical and academic markets. As a result, the IBM RT PC came out a year late in 1986. By then it was neither cheaper nor faster than the competition and and flopped. But the RT's technology did live on in the form of IBM's flavor of Unix AIX.
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But it was a disruptive, fast moving workstation startup Sun Microsystems with the flashiest entry into the fray. Sun Microsystems first product was of course the groundbreaking Sun One workstation computer which ran the Motorola 68000, a powerful 6 CISC processor. Motorola released that first 68,000 in 1979 to great acclaim, and that chip's role in powering the workstation revolution made Motorola one of the world's top semiconductor makers, behind Texas Instruments. But Unix pioneer and sun co founder Bill Joy came to believe that CISC chips like the 68K family cannot scale fast enough to meet customers ever rising demands for computer. So risk then. But which flavor of risk? The original idea was to back something already in the market. So Joy and others spoke to John Hennessey's MIPS computer startup. But MIPS wanted to charge value based pricing, which worked out to about $1,000 to $10,000 per chip. Not okay. So in 1984 the small startup, then about two years old, decided to make their own. They.
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In July 1987 sun announced that its higher end Sun4workstations would run a new chip called SPARC. The acronym SPARC came first. It originally stood for Sun's processor architecture for RISC computers, but was then revised to Scalable processor architecture. SPARC implemented a RISC ISA descended from the Berkeley RISC project. Even so, sun managed to produce SPARC in just about three years, which was only possible thanks to them making it as a semi customized chip with the help of the famous ASIC maker LSI Logic. Jensen Huang has co author credit in the SPARC technical paper. Sun bought a 20,000 gate CMOS gate array from Fujitsu and reprogrammed it with their custom logic, making it something like a proto fpga. The first thing was that this thing screamed. Sun claimed that its Sun 4 chip was 2.5 times faster than its predecessor, the Motorola 36K. In an integer benchmark test it hit a monumental 10 million instructions per second or MIPS. And at $39,000 the Sun 4 workstation cost just a tenth of DEC's VAX 8800 minicomputer the price performance ratio was beyond compelling. Many analysts were impressed, though a few noted that the chip will not hit 10 mips for every task. But the point stood that risk was real. Jonathan Fram, an analyst at Bear Stearns, said, it's exceeding expectations. There were rumors of overheating and hardware failure, but that hasn't been the case. He added that the Bear Stearns team found that the Sun 4 ran even faster than what sun publicly claimed. David Wu, an analyst at the firm Warburg, said, with Motorola, you're topping out at 10 mips, but with Spark you push it out to 20 or 30 mips. They've made the right decision. In going to Sparc, the Sun positioned Spark as an open architecture, well, open for the 1980s. It basically meant that competing Unix workstation vendors can license Sparc from Sun to produce their own Sparc chips. As I mentioned in a prior video, sun had done this before. In 1984, they developed and licensed out a distributed file system protocol called NFS. Over 250 companies adopted it, and them doing so made NFS a de facto standard. Sun wanted to do the same for Sparc. In their minds, licensing would help Risk boost its market share. More market share meant more Spark developers.
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Creating a new competitive force that can challenge IBM, Wintel PCs, and Apple Macintoshes. Sun raced to sign up licensees, and they snagged some flashy customers. The most notable was the telecom giant att. But names like Fujitsu, Cypress Semiconductor, and LSI Logic joined too. But many computer makers hesitated to license Sparc, knowing that it was controlled by an aggressive competitor. And this opened the door to alternate camps of RISC licensees. For example, Hewlett Packard managed to sell its PA RISC chip design to Hitachi and supercomputer maker Convex Computer. But the largest camp was by far the one clustered around the aforementioned startup MIPS computer. MIPS Computer released its first chip, the R2000, in 1986, a year before Sparc's introduction. But it was their follow up, the R3000, that really made an impression. Released in April 1988, the R3000 implemented the R2000's ISA, but added several speed improvements. It was also fab with a faster process node. MIPS claimed that the 25 MHz R3000 got faster than anything else. With as little as a third of the transistors. The R3000 hit an eyebrow raising 20 million instructions per second with just 115,000 transistors. An Intel 386 chip, on the other hand, managed just 4 million instructions per second and needed 350,000 transistors to do it. Even Sparc, as you remember, managed just 10 million instructions per second. The R3000 was adopted by several computer makers, but MIPS also licensed out its design, and that became a major portion of its $40 million of revenue in 1988. Customers included NEC, Sony, and notably Siemens. Siemens going with MIPS meant that sun had to respond, if only to keep a foothold in Europe. So it was a big get for Sparc when they signed Philips in the Netherlands, the third of Europe's three big computer makers.
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Meanwhile, MIPS success soon caught the attention of Digital Equipment Corporation, or dec. DEC was one of America's great computing companies, producers of the iconic PDP and VAX minicomputers. In the late 1980s, the company was near its financial peak, turning out record revenues and profits. But clouds were on the horizon. Timesharing was being replaced by networks of computers. The VAX minicomputer itself was aging and. And sun and Apollo's workstations were eating that cash cow business like hyenas eating a zebra stuck in the mud. And by that I mean it wasn't pretty. They start butt first, you know. DEC felt like it needed its own UNIX RISC workstation to respond, and they dabbled with internal RISC chip efforts. But they never went anywhere, perhaps due to internal politics. Then, in early 1988, John Mashey, VP of Technology Systems at MIPS, met an old friend who then worked at DEC. After seeing some metrics, his friend asked to borrow a couple MIPS systems to try and port dec's flavor of Unix, called Ultrix, over to it. The goal was to show DEC CEO Ken Olson and the rest of the company that it would not take three years and hundreds of people to make a competitive workstation. Two systems were loaned in Boston, and the DEC team did a port in just about three weeks. This caused a stir, especially in Deck's Palo Alto workstation teams, which clamored to build with MIPS chips. So Olson and his team traveled to MIPS headquarters in Sunnyvale for due diligence. The meetings went well. Thus, in September 1988, DEC announced that it invested in MIPS Computer to form an alliance. DEC then tapped MIPS for a new workstation product, the highly anticipated Date Deck station. Priced at $11,900 and said to be 10 times more powerful than a Vax, the Deckstation 3100 was somewhat presumptuously anointed by its engineers as the Sunkiller Mashi told the press at the time. Digital is really tired of losing business to Sun. They're going to make sun work for a living now. DexStation made about a billion dollars in 1989, but ultimately adoption lagged, mostly due to the software ecosystem. Applications makers did not port their packages to the Ultrix Unix OS. MIP's sales rose to 100 million in 1989, and the company IPO'd in December that year at a valuation of $350 million. But then the company faltered. Their next chip, the 64 bit R4000, got delayed, and MIPS workstations got caught between sun, more powerful X86 PCs and a resurgent IBM. More on that in just a little bit. With losses piling up in 1992, they merged with their customer workstation maker, Silicon Graphics Inc. And became an internal division of sgi. Their chip architecture would live on like Celine Dion's heart in embedded systems like video game consoles.
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I mentioned IBM just a moment ago. Soon after MIPS IPO'd, IBM released a spiritual successor to the IBM RTPC, the IBM RISC System 6000 or just Rs6000. Unlike the RT PC, this was a very competitive computer, thanks to a powerful new concept implemented by its CPU superscalar processing. CPUs are linear, meaning that instructions are carried out like as on an assembly line in a factory, step by step, from start to finish. Each step of the instruction is handled by different parts of the cpu. So if you want to go faster, you can do something called pipelining. This is where several instructions can be executed at the same time, but only if those instructions are at different stages of the assembly line. Pipelining has been around since the 1950s. Superscalar processing takes this another step. It is where a CPU initiates several instructions at the same time and executes them all independently within the same core. So imagine the CPU as being a coffee cafe with multiple pieces of equipment, so to say. So like two espresso machines, two milk steaming machines for lattes, and and two coffee grinders. This is all run by a very smart barista. The barista gets multiple orders for espressos, americanos and lattes and knows exactly the workflow to make them. She gets a bunch of orders, breaks down their dependencies, and routes them to the right machine for simultaneous processing. This way she can do two or three orders in the same time as it used to take for one. Translating that to a CPU context. And we have multiple execution units like arithmetic logic units for doing basic math, floating point units for complex decimal math, and units for fetching and storing data. That's our cafe machinery. Our barista is the control logic. During operations, the control logic fetches multiple instructions from the software, determines those instructions dependencies and and then sends it to ALU's, FPUs, etc. For simultaneous processing. The result of all this technical talk is a very fast computer. At its February 1990 launch event in San Francisco, IBM boasted that their RS6000 processor can hit MIPS numbers between 25 and 40. To compare, Sun's SparX station did 12.5 to 15.8. Was the hardware very expensive? Yes, between 13,000 to 100,000 for a workstation. So today 32 grand to 250 grand, though the PER MIPS cost, if you can say that was a thing, was very compelling. And was there software available that can actually take full advantage of all this speed? No, not yet. But what was claimed to be a staggering array of third party software companies were heeding IBM's call. Bill Grabe, IBM's VP of Sales, said, we expect to see 1,500 applications from 700 different vendors at the end of 1990. Four years earlier, everyone laughed at the IBM RT PC. Nobody was laughing now. The RS6000 was a very serious computer and it started a chain reaction of talking cock through the press. When asked for comment, Deck CEO Ken Olson said, we have a few things up our sleeve. Hewlett Packard grunted something similar for their PA RISC chips too. Two months later, in April, MIPS computer announced a new Unix minicomputer server, the RC6280 that did 55 MIPS. It wasn't a workstation, but it helped grab attention in the press. Sun, rattled but unbroken by IBM's volley, Press, promised a spectacular $5,000 workstation with better price performance ratios before the year was out. I believe that was the SparkStation SLC. Texas Instruments in Cypress teased their next generation chips too. TI's Viking would run at 50 MIPS, thanks to a big frequency bump. Cypress's Hyperspark would beat the 50 MIPS mark by adopting superscalar. The RS6000 helped lift IBM's unit sales of RISC workstations from just 40001989 to 16,000 in 1990 and 26,000 the year after that. And it took share away from MIPS and other non SPARC architectures. But Sparc remained dominant throughout 1990 and 1991 with over 60% market share. IBM later evolved the Superscalar enabled power architecture behind Rs6000 into a line of supercomputers One such computer was the Deep Blue Chess machine that defeated Garry Kasparov in 1997. It also spawned the PowerPC, the third major RISC family to emerge during the risk wars. PowerPC came out of the famous AIM alliance between Apple, IBM and Motorola, announced with great fanfare in 1991. I've already done a video about PowerPC, so I recommend you watch that.
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Now. Ken Olson did say that he had something up his sleeve. And indeed he did have something. After struggling to adapt the VAX instruction set for the future, DECK finally conceded that a redo was necessary. In 1989, a task force was put together. Originally called EVAX, they changed the name to Alpha for a clean separation. At this time, DECs started to falter from all the business lost to risc workstations in 1990 and 1991. Budget cuts and layoffs. The later very unusual for DEC end a sign of increasing desperation. So DEC put everything it had into this so called superchip that it would call the Alpha. Alpha sported a new 64 bit architecture, first in the market with 64 bit. It also ran at 200 MHz, a speed once thought to be impossible without exotic semiconductor materials like Gallium arsenide. Together that counted for 200 to 400 MIPS. Announced in February 1992, DEC Alpha reportedly caused a mob scene at the ISSSC conference where it was first presented as people rushed to see the new chip. Olson said at the time, this is a proud day for digital. A rare proud day amidst a very bad year. For decades, a declining core minicomputer market over investment in failed projects like the VAX 9000 and General Strategic disarray translated to deep financial losses. As losses mounted throughout 1992, they would lose $2.1 billion that year. CEO Ken Olson was forced to retire in July. He co founded DEC and ran it for 35 years. So the news was so unexpected that observers said that it felt like a California earthquake. Olson's replacement as CEO was Robert Palmer, a relative outsider who positioned Alfa at the heart of the comeback Deck intended to move all their VAX and MIPS based customers to Alfa. They also announced for the first time that they would sell Alpha to outside customers. The first headlining customer was the famous Cray Research, which chose it for their next big supercomputer to deal with the software issue. DEC even struck a deal with Microsoft to make a version of Windows NT that can run on Alpha. DEC was super bullish on the collaboration, even claiming that Alpha can win 20% market share of the Windows intel market risk supporters embraced this risk dominated Future in a 1992 editorial in the HP Professional Managing Director Grant Evans. With all the major hardware vendors embracing risk and incorporating it into their near term schemes, HP is firmly entrenched in the risk field, the stage for the battle that will change this industry forever. When you think about it, the future of computing is taking shape as we speak. In that Future the only CPUs will be HPPA, DEC, Alpha, IBM, RS and Intel 586. From these building blocks you will be able to build anything you want in that Future. Read now. CPUs are no different than memory chips. A pure commodity. There are no more CIS, HP3000s, no more CIS vacs and no more Cisk. Motorola 68Ks between the HPPA, DEC, Alpha, IBM RS, PowerPC and Intel 586, better known as the Pentium. Only one of those was a CISC chip, a single holdout as increasingly faster RISC chips came out throughout the second half of the 1980s, debate raged on inside intel about RISC. In 1990 an estimated 60% of the workstations in the market were powered by risc chips. In 1991 that reached 70% and in 1993 90% market share. Cisk still dominated. Outside of the workstation world, the PC remained Intel's profitable fortress. In 1993 RISC only had 6% of the 32 bit microprocessor market, but performance wise, it started to feel like the lines between workstations and and the highest end PCs were blurring. Workstation prices were falling to as low as $5,000, and an evasion from one side to the other seemed imminent. Would intel be at risk should they start doing risk as well? Such a path would weaken or take focus off of the rich ecosystem that had grown up around the x86 instruction set. What to do? I should note that intel did sell a RISC like microprocessor in April 1988. Called the intel i960, it was an embedded microprocessor more suited for smaller power constrained environments than PCs. And it sold well, though the company later moved on to something else. But no, intel did not abandon the x86 instruction set for risk. A faction within intel, led by a young Pat Gelsinger, a former student of John Hennessy's back at Stanford, pushed back against the temptation of going risc, pointing out that the lines and performance gaps between what people called CISC and RISC were not actually that large.
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One thing to note about this wave of superscalar adoption by the RISC chip startups. While Superscalar was widely acknowledged as the easiest way to squeeze out more mips without frequency bumps, it also added a great deal of complexity to those who believed in RISC's original principles. This was a mistake. Philosophically speaking, RISC was about cutting out complex instructions and getting efficient with your transistors. That was its advantage. But going superscalar means a lot of additional control logic to fetch instructions, decode them, tracking dependencies and reordering the results. Once you do that, RISC loses much of its simplicity advantage against cisk. In a scenario where RISC and CISK are both similarly complex, what most customers will care about is X86's backwards compatibility with the existing software libraries of applications for ms, dos, Windows, and so on. Gelsinger and others held that intel should stick to that backwards compatibility, to being that so called clunky old boring compatible chip, even if it cost them performance. And that's what they did. In 1993 intel released the Pentium, its follow up to the well received 386 and 486 CPUs. Called a modest design, Intel's key goal with the Pentium was to improve on prior performance and to keep up with IBM and everyone else's RISC offerings using superscalar processing. In that they hit the mark. Microprocessor reports said that the 60 MHz pentium approaches RISC performance in things like integer processing, though not in floating point. In other words, not great, not terrible. The reason for the Pentium's MEH performance was the aforementioned focus on backwards compatibility. An estimated 30% of its 3.1 million transistors were solely for legacy x86 support and the microcode needed to decode those big complicated instructions. Fortunately, intel had Moore's Law on its side. Every two years, intel shrinks its transistors. Smaller transistors mean more transistors, causing the percentage of transistors dedicated to legacy stuff to shrink over time. Unfortunately, other than the odd couple of instructions added every so often, the X86 ISA itself has been mostly stable. So if the First Pentium had 30% of its space for Legacy x86, then Moore's law means maybe 15% after the next shrink, and so on. And by the year 2000, the Pentium 4 would have less than 10% of its transistors dedicated to legacy features. At the same time, intel tweaked the Pentium's microarchitecture to make it more risk, like starting with the Pentium Pro released in 1995, the Pro's microarchitecture, the P6 had several improvements, but one of the more significant ones was an instruction decoder that translated complex x86 instructions to RISC like fixed length instructions called microops. Like breaking down a fried rice recipe into smaller recipe cards that says make cold rice, cut vegetables and crack eggs. Such micro ops are then presented to the rest of the processor. So at the same time that the so called simpler RISC got more complicated with superscalar processing, the so called more complicated X86CISC chips got simpler. AMD, another X86CISC chipmaker did similar with their K5 microprocessor. The Pentium Pro microarchitecture set up X86's invasion into the workstation industry and the heavy duty Server Beyond. In 2005, x86 server revenues eclipsed that of high end RISC for the first time. By then sgi, mips, DEC Alpha and HP PA RISC had all but faded away. Note that I did not mention the work done by Acorn Computers in the early days of arm. There are a few reasons for that. For one thing, ARM mostly covered the mobile and low power space and that is a different thing. Moreover, the whole saga deserves its own video and I am tired. In the end the wars and Risk wars was probably an incorrect moniker. I think what was really happening was a race. Can these chips pull away from x86 enough to compel people to ditch the ecosystem for something else? Though Risk in the workstation grabbed an early lead with their massive MIPS numbers and clean sheet approach, intel realized that x86 only had to run fast enough to get people to stay. Thanks to Moore's Law and the PC industry's profits, they ran fast enough to win that race with the mobile phone industry. That would be a different story. Alright everyone, that's it for tonight. Thanks for watching. Subscribe to the channel, Sign up for the Patreon and I'll see you guys next time.