In 2000, venture capitalists funded 200 semiconductor companies. By 2015, that number had fallen to single digits. The cost of designing a chip went from $33 million in the late 1990s to over $200 million today, and it takes four or more years to complete. There are not enough engineers. The timelines are too long. The investment risk is too high.

Faraj Aalaei has spent three decades watching this problem build. He co-founded Centillium Communications and took it public on Nasdaq in 1997. He co-founded Aquantia, took it public in 2017, and sold it to Marvell Semiconductors in 2019. He then spent several years investing in AI companies before recognizing that generative AI could do for chip design what it has done for software — compress timelines, reduce cost, and open the field to a much wider group of contributors.

In 2024, he founded Cognichip with a straightforward but ambitious vision: everybody should be able to be a chip designer.

Nick sits down with Faraj for a wide-ranging conversation that covers the full landscape — why the semiconductor industry has a structural problem that EDA companies like Synopsys and Cadence cannot solve alone, why generic large language models fall flat when applied to chip design, how Cognichip trains physics-informed models on proprietary synthetic data without touching any customer IP, and what actually happens to the semiconductor industry when design timelines collapse from years to months.

The implications are significant. Hyperscalers like Google, Meta, and Microsoft could design more bespoke ASICs faster and cheaper. Foundries like TSMC would see shorter cycles between customer signup and first wafer revenue. Startups that today cannot raise funding because the design cost is too high would suddenly become investable. And companies like Nvidia — which already iterate faster than anyone in the industry — could move faster still.

The conversation also covers Cognichip's differentiation from agentic workflow competitors, the fundamental reason why physics-informed models are necessary for semiconductor design in a way they are not for software, and — at the very end — the IPO question.

What we cover:

— Why chip design went from $33M to $200M+ and VC funding collapsed

— The engineer shortage and why semiconductors lose to software for talent

— Why the 6-year chip design lag is a fundamental problem for AI progress

— EDA companies and AI — complementary rather than competitive

— How Cognichip trains models without using customer IP

— Physics-informed AI vs. generic LLMs — why the distinction matters

— The vision: anyone can design a chip — what that actually means

— What happens when design timelines collapse — impact on Nvidia, startups, foundries

— Cognichip vs. agentic workflow competitors — the fundamental model difference

— Hyperscaler ASIC strategies and CapEx implications

— Manufacturing yield improvement and AI's role

— The IPO question

Disclosure: Cognichip is a private company and is not publicly investable at this time. This content is for general information only and is not individual investment advice.

chipstockinvestor.com